Error Protection - Hitachi H8/3022 Hardware Manual

H8/3022 series hitachi single-chip microcomputer
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15.8.3

Error Protection

In error protection, an error is detected when H8/3022 Series runaway occurs during flash memory
programming/erasing*
algorithm, and the program/erase operation is aborted. Aborting the program/erase operation
prevents damage to the flash memory due to overprogramming or overerasing.
If the H8/3022 Series malfunctions during flash memory programming/erasing, the FLER bit is set
to 1 in FLMCR2 and the error protection state is entered. The FLMCR1, FLMCR2, EBR1, and
EBR2 settings are retained, but program mode or erase mode is aborted at the point at which the
error occurred. Program mode or erase mode cannot be re-entered by re-setting the P or E bit.
However, PV and EV bit setting is enabled, and a transition can be made to verify mode.*
FLER bit setting conditions are as follows:
1. When the flash memory of the relevant address area is read during programming/erasing
(including vector read and instruction fetch)
2. Immediately after exception handling (excluding a reset) during programming/erasing
3. When a SLEEP instruction (including software standby) is executed during
programming/erasing
Error protection is released only by a power-on reset and in hardware standby mode.
Notes: 1. State in which the P bit and E bit in FLMCR1 are set to 1. Note that NMI input is
disabled in this state.
2. It is possible to perform a program-verify operation on the 128 bytes being
programmed, or an erase-verify on the block being erased.
1
, or operation is not performed in accordance with the program/erase
1
469

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