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S3F84B8_UM_REV 1.00
4.1.30 PWMCCON — PWM CMP CONTROL REGISTER: F0H, BANK0
Bit Identifier
RESET Value
Read/Write
.7–.6
.5–.4
.3–.2
.1–.0
NOTE: When CMP-PWM linkage is used, PWMCCON must be set to appropriate value before enabling PWM.
.7
.6
0
0
R/W
R/W
CMP3 PWM Linkage Mode Selection Bits
X
0
Disables linkage.
0
1
Soft Lock
1
1
Hard lock
CMP2 PWM Linkage Mode Selection Bit
X
0
Disables linkage.
0
1
Soft Lock
1
1
Hard lock
CMP1 PWM Lock Mode Selection Bit
X
0
Disables linkage.
0
1
Soft Lock
1
1
Hard lock
CMP0 PWM Trigger Mode Selection Bit
X
0
Disables linkage.
0
1
Normal trigger
1
1
Delay trigger
.5
.4
0
0
R/W
R/W
R/W
4-30
4 CONTROL REGISTERS
.3
.2
.1
0
0
0
R/W
R/W
.0
0
R/W
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