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S3F84B8_UM_REV 1.00
Table 4-2
Register Name
Operational Amplifier control register
Timer A control register
Timer A clock pre-scalar
Timer A data register
Timer A counter register
Timer C control register
Timer C clock pre-scalar
Timer C data register
Timer C counter register
Timer D control register
Timer D clock pre-scalar
Timer D data register
Timer D counter register
Locations EDH-F1H are not mapped
Reset source indicating register
Location F3H is not mapped
STOP control register
Flash memory control register
Flash memory user programming
enable register
Flash memory sector address register
(high byte)
Flash memory sector address register
(low byte)
Locations F9H – FFH are not mapped
NOTE: –: Not mapped or not used, x: Undefined
System and Peripheral Control Registers Set1 Bank1
Mnemonic
OPACON
TACON
TAPS
TADATA
TACNT
TCCON
TCPS
TCDATA
TCCNT
TDCON
TDPS
TDDATA
TDCNT
RESETID
STOPCON
FMCON
FMUSR
FMSECH
FMSECL
4-3
Address and
Location
Address
R/W
7
E0H
R/W
–
E1H
R/W
E2H
R/W
E3H
R/W
E4H
R
0
E5H
R/W
E6H
R/W
0
E7H
R/W
1
E8H
R
E9H
R/W
EAH
R/W
0
EBH
R/W
1
ECH
R
F2H
RW
Refer to the detailed
description
F4H
R/W
F5H
R/W
0
F6H
R/W
0
F7H
R/W
0
F8H
R/W
0
4 CONTROL REGISTERS
RESET Value (Bit)
6
5
4
3
2
–
–
–
–
–
0
0
0
0
0
0
0
–
–
–
0
0
1
1
1
1
1
1
0
0
0
0
0
0
–
0
0
0
–
–
–
–
0
0
1
1
1
1
1
x
x
x
x
x
x
0
0
0
0
0
0
–
–
–
0
0
1
1
1
1
1
x
x
x
x
x
x
0
0
0
0
0
0
0
0
0
0
–
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
1
0
0
0
–
0
0
1
1
x
x
0
0
0
0
1
1
x
x
0
0
–
0
0
0
0
0
0
0
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