Or — Logical Or - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
6.3.48 OR — LOGICAL OR
dst,src
OR
dst  dst OR src
Operation:
The source operand is logically ORed with the destination operand, and the result is stored in
destination. The contents of source remain unaffected. The OR operation results in a "1" being
stored whenever either of the corresponding bits in two operands is a "1"; otherwise a "0" is
stored.
C: Unaffected.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Set if the result bit 7 is set; cleared otherwise.
V: Always cleared to "0".
D: Unaffected.
H: Unaffected.
Format:
opc
opc
opc
Given R0 = 15H, R1 = 2AH, R2 = 01H, register 00H = 08H, register 01H = 37H, and register 08H
Examples:
= 8AH:
OR
OR
OR
OR
OR
In the first example, if working register R0 contains the value 15H and register R1 contains the
value 2AH, the statement "OR R0,R1" logical-ORs the R0 and R1 register contents and stores
the result (3FH) in destination register R0.
Other examples show the use of logical OR instruction with the various addressing modes and
formats.
dst | src
src dst
dst src

R0,R1

R0,@R2

00H,01H

01H,@00H

00H,#02H
Bytes
2
3
3
R0 = 3FH, R1 = 2AH
R0 = 37H, R2 = 01H, register 01H = 37H
Register 00H = 3FH, register 01H = 37H
Register 00H = 08H, register 01H = 0BFH
Register 00H = 0AH
6-61
6 INSTRUCTION SET
Cycles Opcode
(Hex)
4 42
6 43
6 44
6 45
6 46
Addr Mode
dst src
r r
r lr
R R
R IR
R IM