Bitc — Bit Complement - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
6.3.6 BITC — BIT COMPLEMENT
dst.b
BITC
dst(b)  NOT dst(b)
Operation:
This instruction complements the specified bit within the destination without affecting any other
bits there.
C: Unaffected.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Cleared to "0".
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
opc
In the second byte of instruction format, the destination address is four bits, the bit address 'b' is three bits,
NOTE:
and the LSB address value is one bit in length.
Given R1 = 07H:
Example:
BITC
If working register R1 contains the value 07H (00000111B), the statement "BITC R1.1"
complements bit one of the destination and leaves the value 05H (00000101B) in register R1.
Since the result of complement is not "0", the zero flag (Z) in FLAGS register (0D5H) is cleared.
dst | b | 0

R1.1 R1 = 05H
Bytes Cycles
2
6-18
6 INSTRUCTION SET
Opcode Addr Mode
(Hex)
4 57
dst
rb