Clr — Clear - Samsung S3F84B8 User Manual

8-bit cmos
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S3F84B8_UM_REV 1.00
6.3.15 CLR — CLEAR
dst
CLR
dst  "0"
Operation:
The destination location is cleared to "0".
No flags are affected.
Flags:
Format:
opc
Given Register 00H = 4FH, register 01H = 02H, and register 02H = 5EH:
Examples:
CLR
CLR
In Register (R) addressing mode, the statement "CLR 00H" clears the destination register 00H
value to 00H. In the second example, the statement "CLR @01H" uses Indirect Register (IR)
addressing mode to clear the 02H register value to 00H.
dst
00H
Register 00H = 00H
@01H 
Register 01H = 02H, register 02H = 00H
Bytes
Cycles
2
6-27
6 INSTRUCTION SET
Opcode
Addr Mode
(Hex)
4
B0
4
B1
dst
R
IR

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