Band — Bit And - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
6.3.4 BAND — BIT AND
dst,src.b
BAND
dst.b,src
BAND
dst(0)  dst(0) AND src(b)
Operation:
dst(b)  dst(b) AND src(0)
The specified bit of source (or destination) is logically ANDed with the zero bit (LSB) of the
destination (or source). The resultant bit is stored in specified bit of the destination. No other bits
of the destination are affected. The source remains unaffected.
C: Unaffected.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Cleared to "0".
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
opc
opc
In the second byte of 3-byte instruction formats, the destination (or source) address is four bits, the bit
NOTE:
address 'b' is three bits, and the LSB address value is one bit in length.
Given R1 = 07H and register 01H = 05H:
Examples:
BAND R1,01H.1
BAND 01H.1,R1
In the first example, source register 01H contains the value 05H (00000101B) and destination
working register R1 contains the value 07H (00000111B). The statement "BAND R1,01H.1"
ANDs the bit 1 value of the source register ("0") with the bit 0 value of register R1 (destination),
leaving the value 06H (00000110B) in register R1.
or
dst | b | 0 src
src | b | 1 dst


Bytes
3
3
R1 = 06H, register 01H = 05H
Register 01H = 05H, R1 = 07H
6-16
6 INSTRUCTION SET
Cycles Opcode
(Hex) dst
6 67
6 67
Addr Mode
src
r0 Rb
Rb r0