Figure 9-2 Port 0 Control Register Low Byte (P0Conl) - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
NOTE:
Port 0 Low Control Register (P0CONL)
E4H, Set1, Bank0, R/W, Reset value:00H
MSB .7 .6 .5
P0.3
Not Used
/INT2
/BUZ
.7 -.6 bit/P0.3/INT2/BUZ
00 Input mode/INT2 falling edge interrupt
01 Input mode with pull up /INT2 falling edge interrupt
10 Push-pull output
11 Alternative function : BUZ output
.5 .4 bit Not used for S 3F84B8
.3 .2 bit/P0.1/INT1
00 Input mode/INT1 falling edge interrupt
01 Input mode with pull -up; INT1 falling edge interrupt
10 Push-pull output
11 Open-drain output
.1 .0 bit/P0.0/INT0
00 Input mode/INT0 falling edge interrupt
01 Input mode with pull -up; INT0 falling edge interrupt
10 Push-pull output
11 Open-drain output
P1.2 could be used as either nRESET pin or normal input pin .
Figure 9-2 Port 0 Control Register Low Byte (P0CONL)
.4 .3 .2 .1
P0.1 P0.0
/INT1 /INT0
9-4
.0 LSB
9 I/O PORTS