Interrupt Processing Control Points - Samsung S3F84B8 User Manual

8-bit cmos
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S3F84B8_UM_REV 1.00

5.1.7 INTERRUPT PROCESSING CONTROL POINTS

Interrupt processing can be controlled in two ways: globally or by specific interrupt level and source. The system-
level control points in the interrupt structure are:
Global interrupt enable and disable (by EI and DI instructions or by direct manipulation of SYM.0)
Interrupt level enable/disable settings (IMR register)
Interrupt level priority settings (IPR register)
Interrupt source enable/disable settings in the corresponding peripheral control registers
NOTE: When writing an application program that handles interrupt processing, make sure to include the necessary register
file address (register pointer) information.
EI
nRESET
IRQ0-IRQ7,
Interrupts
S
Q
R
Interrupt Priority
Register
Figure 5-4
Interrupt Request Register
(Read-only)
Interrupt Mask
Register
Global Interrupt Control (EI,
DI or SYM.0 manipulation)
Interrupt Function Diagram
5-6
5 INTERRUPT STRUCTURE
Polling
Cycle
Vector
Interrupt
Cycle

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