Decw — Decrement Word - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
6.3.23 DECW — DECREMENT WORD
dst
DECW
dst  dst – 1
Operation:
The contents of destination location (which must be an even address) and the operand following
that location are treated as a single 16-bit value decremented by one.
C: Unaffected.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Set if the result is negative; cleared otherwise.
V: Set if arithmetic overflow occurred; cleared otherwise.
D: Unaffected.
H: Unaffected.
Format:
opc
Given R0 = 12H, R1 = 34H, R2 = 30H, register 30H = 0FH, and register 31H = 21H:
Examples:
DECW RR0
DECW @R2
In the first example, destination register R0 contains the value 12H and register R1 contains the
value 34H. The statement "DECW RR0" addresses R0 and the following operand R1 as a 16-bit
word and decrements the value of R1 by one, leaving the value 33H.
A system malfunction may occur if you use a Zero flag (FLAGS.6) result together with a DECW instruction.
NOTE:
To avoid this problem, it is recommend that you use DECW, as shown in the following example:
LOOP: DECW RR0
dst

R0 = 12H, R1 = 33H

Register 30H = 0FH, register 31H = 20H
LD R2,R1
OR R2,R0
JR NZ,LOOP
Bytes Cycles
2
6-35
6 INSTRUCTION SET
Opcode Addr Mode
(Hex)
8 80
8 81
dst
RR
IR