Smart Option - Samsung S3F84B8 User Manual

8-bit cmos
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S3F84B8_UM_REV 1.00

2.2.1 SMART OPTION

MSB
MSB
MSB
MSB
LVR enable
or disable bit:
0 = Disable
1 = Enable
NOTE:
1. The unused bits of 3CH, 3DH, 3EH, 3FH must be logic "1".
2. When LVR is enabled, LVR level must be set to appropriate value .
3. P0.2 has only input (without pull-up) function when sets 003F.2 as 0.
4. You must set P0.0,P0.1,P0.2 function on smart option. For example, if you select XIN (P0.0)/XOUT (P0.1)/nRESET(P0.2)
function by smart option , you can't change them to Normal I/O after reset operation.
For Start condition of the chip, Smart option specifies the ROM option. The ROM address used by Smart option is
from 003EH to 003FH. Note that 003CH and 003DH are not used in S3F84B8.
ROM Address : 003CH
.7
.6
.5
.4
Not used
ROM Address: 003DH
.7
.6
.5
.4
Not used
ROM Address: 003EH
.7
.6
.5
.4
Not used
ROM Address: 003FH
.7
.6
.5
.4
LVR level selection
101 = 1.9 V
110 = 2.3 V
Not used
100 = 3.0 V
001 = 3.6V
011 = 3.9 V
Figure 2-2
.3
.2
.1
.0
.3
.2
.1
.0
.3
.2
.1
.0
.3
.2
.1
.0
P0.2/nRESET pin
selection bit:
0 = P0.2 pin enable
1 = nRESET
Pin enable
Smart Option
2-3
2 ADDRESS SPACES
LSB
LSB
LSB
LSB
Oscillation selection bit:
00 = External crystal (Xin/Xtout pin
enable)
01 = External RC(Xin/Xtout pin enable )
10 = Internal oscillator (0.5MHz)
(P0.0,P0.1 are normal IOs)
11 = Internal oscilator (8MHz)
(P0.0,P0.1 are normal IOs)

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