Samsung S3P80C5 Manuals

Manuals and User Guides for Samsung S3P80C5. We have 1 Samsung S3P80C5 manual available for free PDF download: User Manual

Samsung S3P80C5 User Manual

Samsung S3P80C5 User Manual (263 pages)

8-Bit CMOS Microcontrollers

Brand: Samsung | Category: Microcontrollers | Size: 1.44 MB

Table of Contents

Table of Contents

6
List of Register Descriptions

18
- Chapter 1 Product Overview
  
  22
  - Overview
    22
  - S3P80C5/C80C5/C80C8 Microcontroller
    22
  - Features
    23
  - Cpu
    23
  - Block Diagram
    24
  - Pin Assignments
    25
  - Pin Descriptions
    26
  - Pin Circuits
    27
- Chapter 2 Address Spaces
  
  30
  - Overview
    30
  - Program Memory (ROM)
    31
  - Register Architecture
    32
  - Register Page Pointer (PP)
    34
  - Register Set 1
    35
  - Register Set 2
    35
  - Prime Register Space
    36
  - Working Registers
    37
  - Using the Register Pointers
    38
  - Register Addressing
    40
  - Common Working Register Area (C0H-CFH)
    42
  - 4-Bit Working Register Addressing
    43
  - 8-Bit Working Register Addressing
    45
  - System and User Stacks
    47
- Chapter 3 Addressing Modes
  
  50
  - Overview
    50
  - Register Addressing Mode (R)
    51
  - Indirect Register Addressing Mode (IR)
    52
  - Indexed Addressing Mode (X)
    56
  - Direct Address Mode (DA)
    59
  - Indirect Address Mode (IA)
    61
  - Relative Address Mode (RA)
    62
  - Immediate Mode (IM)
    63
  - Overview
    64
  - EMT External Memory Timing Register
    71
  - IMR Interrupt Mask Register
    73
  - IPH Instruction Pointer (High Byte)
    74
  - IPL Instruction Pointer (Low Byte)
    74
  - IPR Interrupt Priority Register
    75
  - IRQ Interrupt Request Register
    76
  - PP Register
    86
  - RP0 Register Pointer 0
    87
  - RP1 Register Pointer 1
    87
  - SPL Stack Pointer (Low Byte)
    88
  - SYM System Mode Register
    89
  - Interrupt Structure
    92
  - Interrupt Vector Addresses
    96
  - Enable/Disable Interrupt Instructions (EI, DI)
    98
  - System-Level Interrupt Control Registers
    98
  - System Mode Register (SYM)
    101
  - Interrupt Mask Register (IMR)
    102
  - Interrupt Priority Register (IPR)
    103
  - Interrupt Request Register (IRQ)
    105
  - Interrupt Pending Function Types
    106
  - Interrupt Source Polling Sequence
    107
  - Interrupt Service Routines
    107
  - Generating Interrupt Vector Addresses
    108
  - Nesting of Vectored Interrupts
    108
  - Instruction Pointer (IP)
    108
  - Fast Interrupt Processing
    108
  - Overview
    110
  - Addressing Modes
    110
  - ADD Add
    124
  - AND Logical and
    125
  - BAND Bit and
    126
  - BCP Bit Compare
    127
  - BITC Bit Complement
    128
  - BITR Bit Reset
    129
  - BITS Bit Set
    130
  - BOR Bit or
    131
  - BTJRF Bit Test, Jump Relative on False
    132
  - BTJRT Bit Test, Jump Relative on True
    133
  - BXOR Bit XOR
    134
  - CALL Call Procedure
    135
  - CCF Complement Carry Flag
    136
  - CLR Clear
    137
  - COM Complement
    138
  - CP Compare
    139
  - CPIJE Compare, Increment, and Jump on Equal
    140
  - CPIJNE Compare, Increment, and Jump on Non-Equal
    141
  - Decimal Adjust
    143
  - DEC Decrement
    144
  - DECW Decrement Word
    145
  - DI Disable Interrupts
    146
  - DIV Divide (Unsigned)
    147
  - DJNZ Decrement and Jump if Non-Zero
    148
  - EI Enable Interrupts
    149
  - EXIT Exit
    151
  - IDLE Idle Operation
    152
  - INC Increment
    153
  - INCW Increment Word
    154
  - IRET Interrupt Return
    155
  - JP Jump
    156
  - JR Jump Relative
    157
  - LD Load
    158
  - LDC/LDE Load Memory
    161
  - LDCD/LDED Load Memory and Decrement
    163
  - LDCI/LDEI Load Memory and Increment
    164
  - LDW Load Word
    167
  - MULT Multiply (Unsigned)
    168
  - NOP no Operation
    170
  - OR Logical or
    171
  - POP Pop from Stack
    172
  - POPUD Pop User Stack (Decrementing)
    173
  - POPUI Pop User Stack (Incrementing)
    174
  - PUSHUD Push User Stack (Decrementing)
    176
  - PUSHUI Push User Stack (Incrementing)
    177
  - RCF Reset Carry Flag
    178
  - RET Return
    179
  - RL Rotate Left
    180
  - RLC Rotate Left through Carry
    181
  - RR Rotate Right
    182
  - RRC Rotate Right through Carry
    183
  - SB0 Select Bank 0
    184
  - SB1 Select Bank 1
    185
  - SBC Subtract with Carry
    186
  - SCF Set Carry Flag
    187
  - SRA Shift Right Arithmetic
    188
  - Srp/Srp0/Srp1
    189
  - Set Register Pointer
    189
  - STOP Stop Operation
    190
  - SUB Subtract
    191
  - SWAP Swap Nibbles
    192
  - TCM Test Complement under Mask
    193
  - TM Test under Mask
    194
  - WFI Wait for Interrupt
    195
  - XOR Logical Exclusive or
    196

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