Mcu Initialization Sequence - Samsung S3F84B8 User Manual

8-bit cmos
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S3F84B8_UM_REV 1.00

8.1.1 MCU INITIALIZATION SEQUENCE

The following sequence of events occurs during a Reset operation:
All interrupts are disabled.
The watchdog function (basic timer) is enabled.
Ports 0–3 are set to input mode.
Peripheral control and data registers are reset to their initial values (see
The program counter is loaded with ROM reset address (0100H) or other values set by the Smart option.
When the programmed oscillation stabilization time interval has elapsed, the address stored in the first and
second bytes of RESET address in ROM is fetched and executed.
nRESET
Watchdog nRESET
nRESET Input
Normal Mode or
Power-Down Mode
LVR nRESET
Figure 8-2
RESET Operation
Figure 8-3
Smart Option
MUX
Reset Block Diagram
Oscillation Stabilization Wait Time (8.19 ms/at 8 MHz)
Idle Mode
Timing for S3F84B8 after RESET
8-3
8 RESET AND POWER-DOWN
Table
8-1,
Table
8-2).
Internal nRESET
Operation Mode

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