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Samsung S3F80P5X Manuals
Manuals and User Guides for Samsung S3F80P5X. We have
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Samsung S3F80P5X manual available for free PDF download: User Manual
Samsung S3F80P5X User Manual (321 pages)
S3F80P5 MICROCONTROLLERS
Brand:
Samsung
| Category:
Microcontrollers
| Size: 4.22 MB
Table of Contents
Important Notice
2
Part I Programming Model
3
Table of Contents
4
Overview
15
Chapter 1 Product Overview
17
S3C8/S3F8-Series Microcontrollers
17
S3F80P5 Microcontroller
17
Features
18
Cpu
18
Memory
18
Instruction Set
18
Instruction Execution Time
18
Interrupts
18
I/O Ports
18
Carrier Frequency Generator
18
Basic Timer and Timer/Counters
18
Back-Up Mode
18
Block Diagram (24-Pin Package)
19
Pin Assignments
20
Pin Circuits
22
Chapter 2 Address Spaces
27
Overview
27
Program Memory
28
Smart Option
29
Register Architecture
31
Register Page Pointer (PP)
33
Register Set 1
34
Register Set 2
34
Prime Register Space
35
Working Registers
36
Using the Register Pointers
37
Register Addressing
39
Common Working Register Area (C0H-CFH)
41
Example 1
42
Example 2
42
4-Bit Working Register Addressing
42
8-Bit Working Register Addressing
44
System and User Stacks
46
Stack Operations
46
User-Defined Stacks
46
Stack Pointers (SPL)
46
Chapter 3 Addressing Modes
49
Overview
49
Register Addressing Mode (R)
50
Indirect Register Addressing Mode (IR)
51
Indexed Addressing Mode (X)
55
Direct Address Mode (DA)
58
Direct Address MODE (Continued)
59
Indirect Address Mode (IA)
60
Relative Address Mode (RA)
61
Immediate Mode (IM)
62
Chapter 4 Control Registers
63
Overview
63
Chapter 5 Interrupt Structure
105
Overview
105
Levels
105
Vectors
105
Sources
105
Interrupt Types
106
Interrupt Vector Addresses
108
Enable/Disable Interrupt Instructions (EI, DI)
110
System-Level Interrupt Control Registers
110
Interrupt Processing Control Points
111
Peripheral Interrupt Control Registers
112
System Mode Register (SYM)
113
Interrupt Mask Register (IMR)
114
Interrupt Priority Register (IPR)
115
Interrupt Request Register (IRQ)
117
Interrupt Pending Function Types
118
Overview
118
Pending Bits Cleared Automatically by Hardware
118
Pending Bits Cleared by the Service Routine
118
Interrupt Source Polling Sequence
119
Interrupt Service Routines
119
Generating Interrupt Vector Addresses
120
Nesting of Vectored Interrupts
120
Instruction Pointer (IP)
120
Fast Interrupt Processing
120
Fast Interrupt Processing (Continued)
121
Procedure for Initiating Fast Interrupt
121
Fast Interrupt Service Routine
121
Programming Guidelines
121
Chapter 6 Instruction Set
123
Overview
123
Data Types
123
Register Addressing
123
Addressing Modes
123
Flags Register (FLAGS)
128
Flag Descriptions
129
Instruction Set Notation
130
Condition Codes
134
Instruction Descriptions
135
Chapter 7 Clock and Power Circuit
211
Overview
211
System Clock Circuit
211
Clock Status During Power-Down Modes
213
System Clock Control Register (CLKCON)
214
Chapter 8 RESET
217
Overview
217
Reset Sources
217
Reset Mechanism
220
Watch Dog Timer Reset
220
LVD Reset
220
Internal Power-On Reset
221
External Interrupt Reset
222
Stop Error Detection & Recovery
223
Power-Down Modes
224
Idle Mode
224
IDLE Mode Release
224
Back-Up Mode
225
Stop Mode
227
Sources to Release Stop Mode
228
Using IPOR to Release Stop Mode
228
Using an External Interrupt to Release Stop Mode
228
SED&R (Stop Error Detect and Recovery)
229
System Reset Operation
230
Hardware Reset Values
231
Recommendation for Unusued Pins
235
Summary Table of Back-Up Mode, Stop Mode, and Reset Status
236
Overview
237
Chapter 9 I/O Ports
239
Port Data Registers
239
Pull-Up Resistor Enable Registers
240
Overview
241
Chapter 10 Basic Timer and Timer 0
242
Basic Timer Control Register (BTCON)
242
Basic Timer Function Description
243
Watch-Dog Timer Function
243
Oscillation Stabilization Interval Timer Function
243
Timer 0 Control Register (T0CON)
244
Timer 0 Function Description
246
Timer 0 Interrupts (IRQ0, Vectors FAH and FCH)
246
Interval Timer Mode
246
Pulse Width Modulation Mode
247
Capture Mode
248
Chapter 17 Mechanical
253
Overview
253
Chapter 11 Timer 1
254
Timer 1 Overflow Interrupt
254
Timer 1 Capture Interrupt
254
Timer 1 Match Interrupt
255
Timer 1 Control Register (T1CON)
257
Overview
259
Chapter 12 Counter a
261
Counter a Control Register (CACON)
261
Counter a Pulse Width Calculations
262
Overview
267
Chapter 13 Timer 2
268
Timer 2 Overflow Interrupt
268
Timer 2 Capture Interrupt
268
Timer 2 Match Interrupt
269
Timer 2 Control Register (T2CON)
271
Chapter 14 Embedded Flash Memory Interface
273
Flash ROM Configuration
273
Overview
273
User Program Mode
274
ISP TM (On-Board Programming) SECTOR
274
Smart Option
275
ISP Reset Vector and ISP Sector Size
276
Flash Memory Control Registers (User Program Mode)
277
Flash Memory User Programming Enable Register (FMUSR)
277
Flash Memory Sector Address Registers
278
Sector Erase
279
The Sector Erase Procedure in User Program Mode
280
Programming
283
The Program Procedure in User Program Mode
283
Reading
288
The Program Procedure in User Program Mode
288
Hard Lock Protection
289
The Program Procedure in User Program Mode
289
Chapter 15 Lower Voltage Detector
293
Low Voltage Detector Control Register (LVDCON)
293
Low Voltage Detector Flag Selection Register (LVDSEL)
293
Chapter 16 Electrical Data
294
Mechanical Data
306
Chapter 18 S3F80P5 Flash MCU
311
Operating Mode Characteristics
311
Chapter 19 Development Tools
312
Target Boards
312
Overview
312
Programming Socket Adapter
312
TB80PB Target Board
314
Third Parties for Development Tools
318
In-Circuit Emulator for SAM8 Family
318
OTP/MTP Programmer
318
Development Tools Suppliers
318
Bit In-Circuit Emulator
318
OTP/MTP Programmer (Writer)
319
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