S3F84B8_UM_REV 1.00
6.3.63 SBC — SUBTRACT WITH CARRY
dst,src
SBC
dst dst – src – c
Operation:
The source operand, along with the current value of carry flag, is subtracted from the destination
operand. The result is stored in destination. The contents of source remain unaffected.
Subtraction is performed by adding the two's-complement of source operand to destination
operand. In multiple precision arithmetic, this instruction allows the carry ("borrow") from
subtraction of low-order operands to be subtracted from subtraction of high-order operands.
C: Set if a borrow occurred (src dst); cleared otherwise.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Set if the result is negative; cleared otherwise.
V: Set if arithmetic overflow occurred, that is, if the operands were of opposite sign and the sign
of result is same as the sign of source; cleared otherwise.
D: Always set to "1".
H: Cleared if there is a carry from the most significant bit of low-order four bits of the result;
set otherwise, indicating a "borrow".
Format:
opc
opc
opc
Given R1 = 10H, R2 = 03H, C = "1", register 01H = 20H, register 02H = 03H, and register 03H =
Examples:
0AH:
SBC
SBC
SBC
SBC
SBC
In the first example, if working register R1 contains the value 10H and register R2 contains the
value 03H, the statement "SBC R1,R2" subtracts the source value (03H) and the C flag value
("1") from the destination (10H) and then stores the result (0CH) in register R1.
dst | src
src
dst
dst
src
R1,R2
R1,@R2
01H,02H
01H,@02H
01H,#8AH
Bytes
2
3
3
R1 = 0CH, R2 = 03H
R1 = 05H, R2 = 03H, register 03H = 0AH
Register 01H = 1CH, register 02H = 03H
Register 01H = 15H,register 02H = 03H, register 03H = 0AH
Register 01H = 95H; C, S, and V = "1"
6-75
6 INSTRUCTION SET
Cycles
Opcode
(Hex)
4
32
6
33
6
34
6
35
6
36
Addr Mode
dst
src
r
r
r
lr
R
R
R
IR
R
IM