Sub — Subtract - Samsung S3F84B8 User Manual

8-bit cmos
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S3F84B8_UM_REV 1.00
6.3.68 SUB — SUBTRACT
dst,src
SUB
dst  dst – src
Operation:
Once source operand is subtracted from destination operand, the result is stored in destination.
The contents of source remain unaffected. Subtraction is performed by adding the two's
complement of source operand to destination operand.
C: Set if a "borrow" occurred; cleared otherwise.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Set if the result is negative; cleared otherwise.
V: Set if arithmetic overflow occurred, that is, if the operands were of opposite signs and the sign
of result is same as the sign of source operand; cleared otherwise.
D: Always set to "1".
H: Cleared if there is a carry from the most significant bit of low-order four bits of result;
else set to indicate a "borrow".
Format:
opc
opc
opc
Given R1 = 12H, R2 = 03H, register 01H = 21H, register 02H = 03H, register 03H = 0AH:
Examples:
SUB
SUB
SUB
SUB
SUB
SUB
In the first example, if working register R1 contains the value 12H and if register R2 contains the
value 03H, the statement "SUB R1,R2" subtracts source value (03H) from destination value
(12H) and stores the result (0FH) in destination register R1.
dst | src
src
dst
dst
src
R1,R2
 
R1,@R2
 
01H,02H
 
01H,@02H
 
01H,#90H
 
01H,#65H
 
Bytes
2
3
3
R1 = 0FH, R2 = 03H
R1 = 08H, R2 = 03H
Register 01H = 1EH, register 02H = 03H
Register 01H = 17H, register 02H = 03H
Register 01H = 91H; C, S, and V = "1"
Register 01H = 0BCH; C and S = "1", V = "0"
6-80
6 INSTRUCTION SET
Cycles
Opcode
(Hex)
4
22
6
23
6
24
6
25
6
26
Addr Mode
dst
src
r
r
r
lr
R
R
R
IR
R
IM

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