Functional Description - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00 11 8-BIT TIMER A

11.1.1 FUNCTIONAL DESCRIPTION

11.1.1.1 Timer A Interrupts
The Timer A module can generate two interrupts: Timer A overflow interrupt (TAOVF) and Timer A match/capture
interrupt (TAINT).
Timer A overflow interrupt (TAOVF) can be cleared by both software and hardware. On the other hand, Timer A
match/capture interrupt (TAINT) pending conditions are cleared by software when it has been serviced.
11.1.1.2 Interval Timer Function
The Timer A module can generate the Timer A match interrupt (TAINT).
When Timer A interrupt occurs, it is serviced by the CPU. The pending condition should be cleared by the
software.
In interval timer mode, a match signal is generated and TAOUT is toggled when the counter value is identical to
the value written to the Timer A reference data register, TADATA. The match signal generates a Timer A match
interrupt and clears the counter.
For example, if you write the value 10H to TADATA and 0BH to TACON, the counter will increment until it reaches
10H. At this point, the TA interrupt request is generated, counter value is reset, and counting is resumed.
11.1.1.3 Pulse Width Modulation Mode
Pulse width modulation (PWM) mode allows you to program the width (duration) of pulse that is outputted at the
TAOUT pin. As in the interval timer mode, a match signal is generated when the counter value is similar to the
value written to Timer A data register. In PWM mode, however, the match signal does not clear the counter.
Instead, it runs continuously, overflowing at FFH, and then continues incrementing from 00H.
Even though you can use the match signal to generate a Timer A overflow interrupt, interrupts are not typically
used in PWM-type applications. Instead, the pulse at the TAOUT pin is held to Low level as long as the reference
data value is less than or equal to (  ) the counter value and then the pulse is held to High level as long as the
data value is greater than ( > ) the counter value. One pulse width is equal to tCLK • 256.
11.1.1.4 Capture Mode
In capture mode, a signal edge detected at the TACAP pin opens a gate and loads the current counter value into
the Timer A data register. You can select rising or falling edges to trigger this operation.
Timer A also gives you capture input source, that is, signal edge at the TACAP pin. You can select the capture
input by setting the value of Timer A capture input selection bit in P1CON, (E7H, Set1 Bank0). When P1CON.3.2
is 00 and 01, the TACAP input or normal input is selected. When P1CON.2.2 is set to 10 and 11, the output is
selected.
Both types of Timer A interrupts can be used in capture mode: the Timer A overflow interrupt is generated
whenever a counter overflow occurs, whereas the Timer A match/capture interrupt is generated whenever a
counter value is loaded into Timer A data register.
By reading the captured data value in TADATA and by assuming a specific value for Timer A clock frequency, you
can calculate the pulse width (duration) of signal that is being inputted at TACAP pin.
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