Tccon — Timer C Control Register: E5H, Bank1 - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
4.1.41 TCCON — TIMER C CONTROL REGISTER: E5H, BANK1
Bit Identifier
RESET Value
Read/Write
.7
.6
.5
.4
.3
.2
.1
.0
.7 .6
0 –
R/W –
Timer 0 Operation Mode Selection Bit
0 Two 8-bit timers mode (Timer C/D)
1 One 16-bit timer mode (Timer 0)
Not used for S3F84B8.
Timer C Counter Clear Bit
0 No effect.
1 Clears the timer C counter (After clearing, returns to zero).
Timer C Start/Stop Bit
0 Stops Timer C.
1 Starts Timer C.
Timer C Match Interrupt Enable Bit
0 Disables Interrupt.
1 Enables Interrupt.
Not used for S3F84B8.
Timer C Match Interrupt Pending Bit
0 No interrupt is pending; clears pending bit (when write).
1 Interrupt is pending.
Not used for S3F84B8.
.5 .4
0 0
R/W R/W R/W
4-38
4 CONTROL REGISTERS
.3 .2 .1
0 – 0
– R/W
.0
–
–