Com — Complement - Samsung S3F84B8 User Manual

8-bit cmos
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S3F84B8_UM_REV 1.00
6.3.16 COM — COMPLEMENT
dst
COM
dst  NOT dst
Operation:
The contents of destination location are complemented (one's complement); all "1's" are changed
to "0's", and vice versa.
C: Unaffected.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Set if the result bit 7 is set; cleared otherwise.
V: Always reset to "0".
D: Unaffected.
H: Unaffected.
Format:
opc
Given R1 = 07H and register 07H = 0F1H:
Examples:
COM
COM
In the first example, destination working register R1 contains the value 07H (00000111B). The
statement "COM R1" complements all the bits in R1: all logic ones are changed to logic zeros,
and vice-versa, leaving the value 0F8H (11111000B).
In the second example, Indirect Register (IR) addressing mode is used to complement the value
of destination register 07H (11110001B), leaving the new value 0EH (00001110B).
dst
R1
R1 = 0F8H
@R1
R1 = 07H, register 07H = 0EH
Bytes
Cycles
2
6-28
6 INSTRUCTION SET
Opcode
Addr Mode
(Hex)
4
60
4
61
dst
R
IR

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