Pwm Control Register (Pwmcon) - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00

16.2.4 PWM CONTROL REGISTER (PWMCON)

The control register for the PWM module, PWMCON, is located at register address EFH, Set 1, Bank 0.
Bit settings in the PWMCON register control the following functions:

Selects the PWM counter clock

Selects the PWM output polarity

Clears the PWM counter

Disables/enables/resumes PWM counter operation

Selects the Anti-Mis-Trigger function

Controls the PWM counter overflow interrupt
A reset clears all the PWMCON bits to logic zero, disabling the entire PWM module.
MSB
PWM input clock
select bits:
00 = fosc/64
01 = fosc/8
10 = fosc/2
11 = fosc/1
PWM Control Registers (PWMCON )
EFH, Set 1, Bank 0, Reset=00H, R/W
.7 .6 .5 .4
PWM output polarity
selection bit
0 = non-inverting
1 = inverting
PWM counter clear bit :
0 = No effect
1 = Clear the 10-bit counter
PWM counter enable bit :
0 = Stop counter
1 = Start (resume countering )
Figure 16-1 PWM Module Control Register (PWMCON)
.3 .2 .1 .0 LSB
PWM 10-bit OVF Interrupt pending bit :
0 = No interrupt pending
0 = Clear pending condition (when write )
1 = Interrupt is pending
PWM counter interrupt enable bit :
0 = Disable PWM OVF interrupt
1 = Enable PWM OVF interrupt
Anti-Mis-Trigger enable bit :
0 = Disable anti -mis-trigger function
1 = Enable anti -mis-trigger function
16-4
16 10-BIT IH-PWM