Bitc Bit Complement - Samsung S3C84I8 User Manual

S3C84I8/F84I8/C84I9/F84I9
BITC
— Bit Complement
dst.b
BITC
dst(b) ← NOT dst(b)
Operation:
This instruction complements the specified bit within the destination without affecting any other bit
in the destination.
C: Unaffected.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Cleared to "0".
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
opc
NOTE: In the second byte of the instruction format, the destination address is four bits, the bit
Given: R1 = 07H
Example:
BITC
If the working register R1 contains the value 07H (00000111B), the statement "BITC R1.1"
complements bit one of the destination and leaves the value 05H (00000101B) in the register R1.
Because the result of the complement is not "0", the zero flag (Z) in the FLAGS register (0D5H) is
cleared.
dst | b | 0
address "b" is three bits, and the LSB address value is one bit in length.
→
R1.1
Bytes Cycles
2
R1 = 05H
INSTRUCTION SET
Opcode Addr Mode
(Hex)
4 57
dst
rb
6-19