Local Bus Interrupter Status Register (Bits 24-31) - Motorola MVME1X7P Programmer's Reference Manual

Local Bus Interrupter Status Register (bits 24-31)

ADR/SIZ
BIT
31
NAME ACF
OPER R
RESET
0 PSL
This register is the local bus interrupter status register. When an interrupt
status bit is high, a local bus interrupt is being generated. When an interrupt
status bit is low, a local interrupt is not being generated. The interrupt
status bits are:
TIC1
TIC2
VI1E
PE
MWP
SYSF
AB
ACF
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$FFF40068 (8 bits of 32)
30 29 28
AB SYSF MWP
R R R
0 PSL 0 PSL 0 PSL
Tick timer 1 interrupt.
Tick timer 2 interrupt
VMEbus IRQ1 edge-sensitive interrupt.
Not used on MVME1x7P.
VMEbus master write post error interrupt.
VMEbus SYSFAIL interrupt.
Not used on MVME1x7P.
VMEbus ACFAIL interrupt.
LCSR Programming Model
27 26 25
PE VI1E TIC2
R R R
0 PSL 0 PSL 0 PSL
2
24
TIC1
R
0 PSL
2-77