Error Logger Register - Motorola MVME1X7P Programmer's Reference Manual

Error Logger Register

ADR/SIZ
BIT
31
NAME ERRLOG
OPER
R/C
RESET 0 PLS
SBE
MBE
ERA
EALT
ESCRB
ERD
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1st $FFF4305C/2nd $FFF4315C (8-bits)
30 29 28
ERD ESCRB ERA
R R R
0 PLS 0 PLS 0 PLS
SINGLE BIT ERROR is set when the last error logged
was due to a single-bit error. It is cleared when a 1 is
written to the ERRLOG bit. The syndrome code reflects
the bit in error. (Refer to the
MULTIPLE BIT ERROR is set when the last error logged
was due to a multiple bit error. It is cleared when a 1 is
written to the ERRLOG bit. The syndrome code is
meaningless if MBE is set.
This bit provides status for a function that is not currently
used in the MCECC sector.
EALT indicates that the last logging of an error occurred
on a DRAM access by an alternate (MI not asserted)
local bus master.
ESCRB indicates the entity that was accessing DRAM at
the last logging of a single- or double-bit error. If ESCRB
is 1, it indicates that the scrubber was accessing DRAM.
If ESCRB is 0, it indicates that the local MC680x0 bus
master was accessing DRAM.
ERD reflects the state of the local bus READ signal pin at
the last logging of a single- or double-bit error. ERD = 1
corresponds to READ = high and ERD = 0 to READ =
low. ERD is meaningless if ESCRB is set.
Programming Model
27 26 25
EALT 0 MBE
R R R
0 PLS X 0 PLS
Syndrome Decoding
24
SBE
4
R
0 PLS
section.)
4-27