Dmac Control Register 2 (Bits 0-7) - Motorola MVME1X7P Programmer's Reference Manual

VMEchip2
2

DMAC Control Register 2 (bits 0-7)

ADR/SIZ
BIT
NAME
OPER
RESET
2-58
SNP These bits control the snoop signal lines on the local bus
when the DMAC is local bus master and it is not accessing
the command table. The snooping functions differ
according to processor type, as shown:
SNP
14 13
0 0 Snoop disabled
0 1 Source dirty, sink byte/word/longword
1 0 Source dirty, invalidate line
1 1 Snoop disabled (Reserved)
INTE This bit is used only in command chaining mode. It is only
modified when the DMAC loads the control register from
the control word in the command packet. When this bit in
the command packet is set, an interrupt is sent to the local
bus interrupter when the command in the packet has been
executed. The local bus is interrupted if the DMAC
interrupt is enabled.
7 6
BLK
R/W
0 PS
This portion of the control register is loaded by the processor or the DMAC
when it loads the command word from the command packet. Because this
byte is loaded from the command packet in command chaining mode, the
descriptions here also apply to the control word in the command packet.
VME AM These bits define the address modifier codes the DMAC
drives on the VMEbus when it is bus master. During
non-block transfer cycles, bits 0-5 define the VMEbus
address modifiers. During block transfers, bits 2-5 define
Requested Snoop Operation
MC68040
$FFF40034 (8 bits of 32)
5 4 3
VME AM
R/W
0 PS
Computer Group Literature Center Web Site
MC68060
Snoop enabled
Snoop disabled
Snoop enabled
Snoop disabled
2 1 0