Table of Contents
Advertisement
SCC LTO Error
Description:
MPU Notification:
Status:
Comments:
LAN Parity Error
Description:
MPU Notification:
Status:
Comments:
LAN Offboard Error
Description:
MPU Notification:
Status:
Comments:
http://www.motorola.com/computer/literature
Local Bus Time-out occurred while the SCC was Local
Bus master.
SCC Transmit Interrupt or SCC Receive Interrupt
SCC Transmit Interrupt Status register
SCC Transmit Current Buffer Address register
SCC Receive Interrupt Status register High
SCC Receive Current Buffer Address register PCCchip2
SCC Error Status register ($FFF4201C)
SCC Transmit and Receive interrupt enables are controlled
in the SCC and in the PCCchip2.
Parity error while the LANCE was reading DRAM
PCCchip2 Interrupt (LAN ERROR IRQ)
PCCchip2 LAN Error Status register ($FFF42028)
The LANCE has no ability to respond to TEA so the error
interrupt and status are provided in the PCCchip2. Control
for the interrupt is in the PCCchip2 LAN Error Interrupt
Control register ($FFF4202B).
Error encountered while the LANCE was attempting to go
to the VMEbus.
PCCchip2 Interrupt (LAN ERROR IRQ)
PCCchip2 LAN Error Status register ($FFF42028)
The LANCE has no ability to respond to TEA so the error
interrupt and status are provided in the PCCchip2. Control
for the interrupt is in the PCCchip2 LAN Error Interrupt
Control register ($FFF4202B).
Error Conditions
1-61
1
Advertisement
Table of Contents
