Table 1-5. Vmechip2 Memory Map (Sheet 1 Of 3) - Motorola MVME1X7P Programmer's Reference Manual

Programming Issues
1
VMEchip2 LCSR Base Address = $FFF40000
OFFSET:
31
0
4
8
C
10
31
14
18
1C
20
24
MAST
D16
28
EN
2C
31
30
34
38
3C
40
44
48
1-26

Table 1-5. VMEchip2 Memory Map (Sheet 1 of 3)

30 29 28 27 26
SLAVE ADDRESS TRANSLATION ADDRESS 1
SLAVE ADDRESS TRANSLATION ADDRESS 2
ADDER
2
30 29 28 27 26
MASTER ADDRESS TRANSLATION ADDRESS 4
MAST
WP MASTER AM 4
EN
GCSR GROUP SELECT
30 29 28 27 26
TICK TICK CLR IRQ
2/1 IRQ 1 IRQ STAT
EN
25 24 23 22
SLAVE ENDING ADDRESS 1
SLAVE ENDING ADDRESS 2
SNP WP SUP USR
2 2 2 2
25 24 23 22
MASTER ENDING ADDRESS 1
MASTER ENDING ADDRESS 2
MASTER ENDING ADDRESS 3
MASTER ENDING ADDRESS 4
MAST MAST
D16 WP
EN EN
GCSR
BOARD SELECT
25 24 23 22
WAIT
RMW
VMEBUS
VMEBUS INTERRUPT VECTOR
INTERRUPT
LEVEL
This sheet continues on facing page.
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21 20 19 18 17
BLK
A32 A24 BLK PRGM
D64
2 2 2 2
2
21 20 19 18 17
MASTER AM 3
MAST MAST MAST
4 3 2
EN EN EN
21 20 19 18 17
ROM DMA TB SRAM
ZERO SNP MODE SPEED
DMA CONTROLLER
DMA CONTROLLER
DMA CONTROLLER
DMA CONTROLLER
16
DATA
2
16
MAST
1
EN
16