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Table 1-9. Cirrus Logic CD2401 Serial Port Memory Map (Continued)
Base Address = $FFF45000
Register Description
Receive Frame Address Register1
Receive Frame Address Register2
Receive Frame Address Register3
Receive Frame Address Register4
CRC Polynomial Select Register
Receive Baud Rate Period Register
Receive Clock Option Register
Transmit Baud Rate Period Register
Transmit Clock Option Register
Channel Command Register
Special Transmit Command Register
Channel Status Register
Modem Signal Value Registers
Local Interrupt Vector Register
Interrupt Enable Register
Local Interrupting Channel Register
Stack Register
Receive Priority Interrupt Level Register
Receive Interrupt Register
Receive Interrupt Status Register
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Register
Name
Bit Rate and Clock Option Registers
RFAR1
RFAR2
RFAR3
RFAR4
CPSR
RBPR
RCOR
TBPR
TCOR
Channel Command and Status Registers
CCR
STCR
CSR
MSVR-
RTS
MSVR-
DTR
Interrupt Registers
LIVR
IER
LICR
STK
Receive Interrupt Registers
RPILR
RIR
RISR
Memory Maps
Offsets
Size
Access
1F
B
R/W Sync
1E
B
R/W Sync
1D
B
R/W Sync
1C
B
R/W Sync
D6
B
R/W Sync
CB
B
R/W
C8
B
R/W
C3
B
R/W
C0
B
R/W
13
B
R/W
12
B
R/W
1A
B
R
DE
B
R/W
DF
B
R/W
09
B
R/W
11
B
R/W
26
B
R/W
E2
B
R
E1
B
R/W
ED
B
R
88
W
R/W
(NOTE)
1
1-37
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