Board Control Register - Motorola MVME1X7P Programmer's Reference Manual

Single-board computer
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VMEchip2

Board Control Register

2
ADR/SIZ
BIT
NAME
OPER
RESET
2-70
$FFF40060 (8 bits [7 used] of 32)
31
30
29
SCON
SFFL
R
X
RSWE
The
RESET
VMEbus interface" option. This bit is duplicated at the
same bit position in the MC2 chip at location $FFF42044.
When this bit or the duplicate bit in the MC2 chip is high,
the
RESET
RESET
BDFLO
When this bit is high, the VMEchip2 asserts the
BRDFAIL signal pin. When this bit is low, this bit does
not contribute to the BRDFAIL signal on the VMEchip2.
CPURS
When this bit is set high, the powerup reset status bit is
cleared. This bit is always read 0.
PURS
This bit is set by a powerup reset. It is cleared by a write
to the CPURS bit.
BRFLI
When this status bit is high, the BRDFAIL signal pin on
the VMEchip2 is asserted. When this status bit is low, the
BRDFAIL signal pin on the VMEchip2 is not asserted.
The BRDFAIL pin may be asserted by an external device,
the BDFLO bit in this register, or a watchdog time-out.
SFFL
When this status bit is high, the SYSFAIL signal line on
the VMEbus is asserted. When this status bit is low, the
SYSFAIL signal line on the VMEbus is not asserted.
SCON
When this status bit is high, the VMEchip2 is configured
as system controller. When this status bit is low, the
VMEchip2 is not configured as system controller.
28
27
BRFLI
PURS
R
R
R
X
1 PSL
1 P
switch enable bit is used with the "no
switch is enabled. When both bits are low, the
switch is disabled.
Computer Group Literature Center Web Site
26
25
24
CPURS BDFLO RSWE
C
R/W
R/W
0 PS
1 PSL
1 P

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