Local-Bus-To-Vmebus Requester Control Register - Motorola MVME1X7P Programmer's Reference Manual

VMEchip2
2

Local-Bus-to-VMEbus Requester Control Register

ADR/SIZ
BIT
NAME
OPER
RESET
2-54
TBLSC These bits control the snoop signal lines on the local bus
when the DMAC is table walking. The snooping functions
differ according to processor type, as shown:
TBLSC
19 18
0 0 Snoop disabled
0 1 Source dirty, sink byte/word/longword
1 0 Source dirty, invalidate line
1 1 Snoop disabled (Reserved)
ROM0 This bit is not used on the MVME1x7P. Its function is
performed by the ROM0 bit in the Petra/MC2 PROM
Access Time Control register. Refer to Chapter 3.
WAIT RMW This function is not used on the MVME1x7P.
$FFF40030 (8 bits [7 used] OF 32)
15 14 13
ROBN DHB DWB
R/W R R/W
0 PS 0 PS 0 PSL
This register controls the VMEbus request level, the request mode, and
release mode for the local-bus-to-VMEbus interface.
LVREQL These bits define the VMEbus request level. The request
level can only change while the VMEchip2 is bus master.
The VMEchip2 always requests at the old level until it
becomes bus master and the new level takes effect. If the
VMEchip2 is bus master when the level is changed, the
new level does not take effect until the bus has been
released and re-requested at the old level. The requester
always requests the VMEbus at level 3 the first time
following a SYSRESET.
Requested Snoop Operation
MC68040
12 11 10
LVFAIR LVRWD
R/W R/W
0 PS 0 PS
Computer Group Literature Center Web Site
MC68060
Snoop enabled
Snoop disabled
Snoop enabled
Snoop disabled
9 8
LVREQL
R/W
0 PS