Motorola mobile workstation 800 series owner's manual model f5207a, f5217a (62 pages)
Summary of Contents for Motorola MVME197DP
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MVME197DP and MVME197SP Single Board Computers User’s Manual (MVME197/D1)
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Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes.
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Preface This document provides general information, hardware preparation and installation instructions, operating instructions, and a functional description for the MVME197DP and MVME197SP versions of the MVME197 series of Single Board Computers. This document is intended for anyone who wants to design OEM systems, supply additional capability to an existing compatible system, or work in a lab environment for experimental purposes.
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Data and address sizes are defined as follows: A byte is eight bits, numbered 0 through 7, with bit 0 being the least significant. A two-byte is 16 bits, numbered 0 through 15, with bit 0 being the least significant. For the MVME197series and other RISC modules, this is called a half-word.
2. Although not shown in the above list, each Motorola Computer Group manual publication number is suffixed with characters which represent the revision level of the document, such as “/D2” (the second revision of a manual);...
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Intel i82596 Ethernet Controller User’s Manual Cirrus Logic CD2401 Serial Controller User’s Manual SGS-Thompson MK48T08 NVRAM/TOD Clock Data Sheet The following non-Motorola publications may also be of interest and may be obtained from the sources indicated. The VMEbus Specification is contained in ANSI/IEEE Standard 1014-1987.
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The computer programs stored in the Read Only Memory of this device contain material copyrighted by Motorola Inc., first published 1991, and may be used only under license such as the License for Computer Programs (Article 14) contained in Motorola’s Terms and Conditions of Sale, Rev. 1/79.
DO NOT SUBSTITUTE PARTS OR MODIFY EQUIPMENT. Because of the danger of introducing additional hazards, do not install substitute parts or perform any unauthorized modification of the equipment. Contact your local Motorola representative for service and repair to ensure that safety features are maintained.
This user’s manual provides general information, preparation for use and installation instructions, operating instructions, and a functional description for the MVME197DP and MVME197SP versions of the MVME197 series of single board computers, hereafter referred to as the MVME197, unless separately specified.
VMEchip2 DMA transfers to the VMEbus, however, can be 64 bits wide as Block Transfer (BLT). Features These are some of the major features of the MVME197DP/SP single board computers: Single MC88110 RISC Microprocessor with an MC88410 Cache Controller (MVME197SP module series only)
BLT (D16/D32/D64)) – VMEbus interrupter – VMEbus interrupt handler – Global CSR for inter-processor communications – DMA for fast local memory - VMEbus transfers (A16/A24/A32, D16/D32 BLT (D16/D32/D64)) Specifications The specifications for the MVME197DP/SP are listed in the following table. MVME197/D1...
Cooling Requirements The Motorola MVME197 VMEmodule is specified, designed, and tested to operate reliably with an incoming air temperature range from 0˚ to 55˚ C (32˚ to 131˚ F) with forced air cooling at a velocity typically achievable by using a 100 CFM axial fan.
For minimum RF emissions, it is essential that the conditions above be implemented; failure to do so could compromise the FCC compliance of the equipment containing the module. Equipment Required The following equipment is required to make a complete system using the MVME197DP/SP: System console terminal Disk drives and controllers MVME197/D1...
Detailed support information such as connector signal descriptions, the module parts list, and the schematic diagram for the MVME197DP/SP is contained in the SIMVME197 Single Board Computer Support Information manual. This manual may be obtained free of charge by contacting your local Motorola sales office. User’s Manual...
AND INSTALLATION Introduction This chapter provides unpacking instructions, hardware preparation, and installation instructions for the MVME197DP/SP versions of the MVME197 series of single board computers. The MVME712X transition module hardware preparation is provided in separate manuals, refer to the Related Documentation section of this guide.
Configuration Switches The location of the switches, connectors, and LED indicators on the MVME197DP/SP is illustrated in Figure 2-1. The MVME197DP/SP has been factory tested and is shipped with factory switch settings that are described in the following sections. The MVME197DP/SP operates with its required and factory-installed Debug Monitor, MVME197Bug (197Bug), with these factory switch setting.
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The MVME197DP/SP can be the system controller. The system controller function is enabled or disabled by configuring selectable switch segment S1-9. When the MVME197DP/SP is the system controller, the SCON LED is turned ON. The VMEchip2 may be configured as a system controller as illustrated below.
Configuration Switch S6: Serial Port 4 Clock Select (S6-1, S6-2) Serial port 4 can be configured to use clock signals provided by the RTXC4 and TRXC4 signal lines. Switch segments S6-1 and S6-2 on the MVME197DP/SP configures serial port 4 to drive or receive TRXC4 and RTXC4, respectively.
J1. The basic form, fit, and function of this mezzanine connector is not changed. On the MVME197DP/SP module series there is a bank of ten two-way switch segments which is designated connector J4. This connector switch is not used and all ten switch segments are soldered over.
Board Computers Programmer’s Reference Guide). Some cable(s) are not provided with the MVME712X module and therefore, are made or provided by the user. (Motorola recommends using shielded cables for all connections to peripherals to minimize radiation). Connect the peripherals to the cable(s).
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DRAM at base physical address $00000000, as programmed by the MVME197Bug firmware. This may be changed, by software, to any other base address. Refer to the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide for details.
OPERATING INSTRUCTIONS Introduction This chapter provides the necessary information to use the MVME197DP/SP VMEmodule in a system configuration. This includes controls and indicators, memory maps, and software initialization of the module. Controls and Indicators The MVME197 Single Board Computer has two push-button switches...
Operating Instructions be generated by the RESET switch, a power up reset, a watchdog timeout, or by a control bit in the LCSR. SYSRESET* remains asserted for at least 200 msec, as required by the VMEbus specification. Similarly, the VMEchip2 provides an input signal and a control bit to initiate a local reset operation.
Memory Maps The memory maps of MVME197 devices are provided in the following tables. Table 3-1 is the entire map from $00000000 to $FFFFFFFF. Many areas of the map are user-programmable, and suggested uses are shown in the table. This is assuming no address translation is used between the PA/PD bus and local peripheral bus and between the local peripheral bus and VMEbus.
Operating Instructions The following table focuses on the Local Devices portion of the Memory Map. Table 3-2. Local Devices Memory Map Address Range Devices Accessed Port Size Size Notes $FFF00000 - $FFF00FFF BusSwitch D64-D8 $FFF01000 - $FFF01FFF ECDM (DCAM access) $FFF02000 - $FFF02FFF reserved $FFF03000 - $FFF03FFF...
Memory Maps 2. Address is the physical address going to the device. It is after the BusSwitch translation from the MC88110 address to the device seen address. 3. Writes to the LCSR in the VMEchip2 must be 32 bits. LCSR writes of 8 or 16 bits terminate with a TEA signal. Writes to the GCSR may be 8, 16, or 32 bits.
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Operating Instructions Table 3-5. DCAM (I C) Register Memory Map DCAM (I C) Base Address = $C0 (default) Offset BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 00 00 ID Register 01 01 Version Register 02 02 SL31...
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Table 3-6. VMEchip2 Memory Map (Continued) (Sheet 4 of 4) VMEchip2 GCSR Base Address = $FFF40100 CHIP REVISION CHIP ID SIG3 SIG2 SIG1 SIG0 SCON GENERAL PURPOSE CONTROL AND STATUS REGISTER 0 GENERAL PURPOSE CONTROL AND STATUS REGISTER 1 GENERAL PURPOSE CONTROL AND STATUS REGISTER 2 GENERAL PURPOSE CONTROL AND STATUS REGISTER 3 GENERAL PURPOSE CONTROL AND STATUS REGISTER 4 GENERAL PURPOSE CONTROL AND STATUS REGISTER 5...