Scc Parity Error; Scc Offboard Error - Motorola MVME1X7P Programmer's Reference Manual

Single-board computer
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Programming Issues
1

SCC Parity Error

Description:
MPU Notification:
Status:
Comments:

SCC Offboard Error

Description:
MPU Notification:
Status:
Comments:
1-60
Parity Error detected while the SCC was reading DRAM.
SCC Transmit Interrupt or SCC Receive Interrupt
SCC Transmit Interrupt Status register
SCC Transmit Current Buffer Address register
SCC Receive Interrupt Status register High
SCC Receive Current Buffer Address register PCCchip2
SCC Error Status register ($FFF4201C)
SCC Transmit and Receive interrupt enables are controlled
in the SCC and in the PCCchip2.
Error encountered while the SCC was attempting to go to
the VMEbus.
SCC Transmit Interrupt or SCC Receive Interrupt
SCC Transmit Interrupt Status register
SCC Transmit Current Buffer Address register
SCC Receive Interrupt Status register High
SCC Receive Current Buffer Address register PCCchip2
SCC Error Status register ($FFF4201C)
SCC Transmit and Receive interrupt enables are controlled
in the SCC and in the PCCchip2.
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