Interrupt Clear Register (Bits 8-15); Interrupt Level Register 1 (Bits 24-31) - Motorola MVME1X7P Programmer's Reference Manual

Interrupt Clear Register (bits 8-15)

ADR/SIZ
BIT
15
NAME CSW7
OPER C
RESET
X
This register is used to clear the edge software interrupts. An interrupt is
cleared by writing a 1 to its clear bit. The clear bits are:
CSW0
CSW1
CSW2
CSW3
CSW4
CSW5
CSW6
CSW7

Interrupt Level Register 1 (bits 24-31)

ADR/SIZ
BIT
31
NAME
OPER
RESET
This register is used to define the level of the abort interrupt and the
ACFAIL interrupt.
AB LEVEL
ACF LEVEL These bits define the level of the ACFAIL interrupt.
http://www.motorola.com/computer/literature
$FFF40074 (8 bits of 32)
14 13 12
CSW6 CSW5 CSW4
C C C
X X X
Clear software 0 interrupt.
Clear software 1 interrupt.
Clear software 2 interrupt.
Clear software 3 interrupt.
Clear software 4 interrupt.
Clear software 5 interrupt.
Clear software 6 interrupt.
Clear software 7 interrupt.
$FFF40078 (8 bits [6 used] of 32)
30 29 28
ACF LEVEL
R/W
0 PSL
Not used on MVME1x7P.
LCSR Programming Model
11 10 9
CSW3 CSW2 CSW1
C C C
X X X
27 26 25
AB LEVEL
R/W
0 PSL
2
8
CSW0
C
X
24
2-87