Base Address Register; Dram Control Register - Motorola MVME1X7P Programmer's Reference Manual

Base Address Register

These eight bits are combined with the two most significant bits in Register
7 (the next register) to form BAD31-BAD22, which defines the base
address of the memory. For larger memory sizes, the lower significant bits
are ignored.
The bit assignments for the Base Address register are:
ADR/SIZ
BIT 31
NAME
BAD31
OPER
R/W
RESET 0 PLS

DRAM Control Register

The bit assignments for the DRAM Control register are:
ADR/SIZ
BIT 31 30
NAME
BAD23 BAD22 RWB5 RWB4
OPER
R/W R/W
RESET 0 PLS 0 PLS
RAMEN
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1st $FFF43014/2nd $FFF43114 (8-bits)
30 29 28
BAD30 BAD29 BAD28
R/W R/W R/W
0 PLS 0 PLS 0 PLS
1st $FFF43018/2nd $FFF43118 (8-bits)
29 28
R/W R/W
0 PLS 0 PLS
RAM Enable. This control bit is used to enable the local
bus to perform read/write accesses to the memory.
Accesses are enabled when this bit is set and are disabled
when this bit is cleared. This bit should only be set after
BAD31-BAD22 have been initialized.
27 26
BAD27 BAD26
R/W R/W
0 PLS 0 PLS
27 26 25
RWB3 NCEIEN NCEBEN RAMEN
R/W R/W R
0 PLS 0 PLS 0 PLS
Programming Model
25 24
BAD25 BAD24
R/W R/W
0 PLS 0 PLS
24
R/W
0 PLS
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