Dmac Ton/Toff Timers And Vmebus Global Time-Out Control Register - Motorola MVME1X7P Programmer's Reference Manual

Single-board computer
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DMAC Ton/Toff Timers and VMEbus Global Time-out Control Register

ADR/SIZ
BIT
23
NAME
OPER
RESET
This register controls the DMAC time off timer, the DMAC time on timer,
and the VMEbus global time-out timer.
VGTO
TIME ON
TIME OFF
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$FFF4004C (8 bits of 32)
22
21
TIME OFF
R/W
0 PS
These bits define the VMEbus global time-out value.
When DS0 or DS1 is asserted on the VMEbus, the timer
begins timing. If the timer times out before the data
strobes are removed, a BERR signal is sent to the
VMEbus. The global time-out timer is disabled when the
VMEchip2 is not system controller.
0
8 s
1
64 s
2
256 s
3
The timer is disabled
These bits define the maximum time the DMAC spends
on the VMEbus:
0
16 s
1
32 s
2
64 s
3
128 s
These bits define the minimum time the DMAC spends
off the VMEbus:
0
0 s
1
16 s
2
32 s
3
64 s
LCSR Programming Model
20
19
18
TIME ON
R/W
0 PS
4
256 s
5
512 s
6
1024 s
7
When done (or no data)
4
128 s
5
256 s
6
512 s
7
1024 s
17
16
VGTO
R/W
0 PS
2-65
2

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