T640 Core Router Hardware Guide
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Data Flow Through the T640 Router
Figure 3: Data Flow Through the T640 Router
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Switch Interface ASICs, which extract the route lookup key and manage the flow of
data cells across the switch fabric.
Media-specific ASICs on the PICs that perform control functions tailored to the PIC
media types.
T640 Chassis Description on page 13
T640 Physical Specifications on page 421
Replacing T640 Packet Forwarding Engine Components on page 287
To ensure the efficient movement of data through the T640 Core Router, the router is
designed so that ASICs on the hardware components handle the forwarding of data.
Data flows through the T640 router in the following sequence (see
Packets arrive at an incoming PIC interface.
1.
The PIC passes the packets to the FPC, where the Layer 2/Layer 3 Packet Processing
2.
ASIC performs Layer 2 and Layer 3 parsing and divides the packets into 64-byte cells.
The Switch Interface ASIC extracts the route lookup key, places it in a notification and
3.
passes the notification to the T-series Internet Processor. The Switch Interface ASIC
also passes the data cells to the Queuing and Memory Interface ASICs for buffering.
Figure 3 on page
Copyright © 2013, Juniper Networks, Inc.
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