T640 Packet Forwarding Engine Architecture; Data Flow Through The T640 Router - Juniper T640 Hardware Manual

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T640 Packet Forwarding Engine Architecture

Related
Documentation

Data Flow Through the T640 Router

Copyright © 2017, Juniper Networks, Inc.
Replacing a T640 Routing Engine on page 317
T640 Routing Engine Description on page 36
Maintaining the T640 Routing Engines on page 448
The Packet Forwarding Engines provide the Layer 2 and Layer 3 packet switching,
forwarding, and route lookup functions. In a maximum configuration with eight Type 3
FPCs installed, the Packet Forwarding Engines can forward up to 640 million packets
per second (Mpps) for all packet sizes. The maximum aggregate throughput rate for the
T640 router is 320 Gbps (full duplex). The Packet Forwarding Engines are implemented
in ASICs that are physically located on the FPCs and the PICs.
Each Packet Forwarding Engine consists of the following components (see
page 8):
Layer 2/Layer 3 Packet Processing ASIC, which performs Layer 2 and Layer 3
encapsulation and de-encapsulation, and manages the division and reassembly of
packets within the T640 router.
Queuing and Memory Interface ASICs, which manage the buffering of data cells in
memory and the queueing of notifications.
T-series Internet Processor, which provides the route lookup function.
Switch Interface ASICs, which extract the route lookup key and manage the flow of
data cells across the switch fabric.
Media-specific ASICs on the PICs that perform control functions tailored to the PIC
media types.
T640 Chassis Description on page 15
T640 Physical Specifications on page 119
Replacing T640 Packet Forwarding Engine Components
To ensure the efficient movement of data through the T640 Core Router, the router is
designed so that ASICs on the hardware components handle the forwarding of data.
Data flows through the T640 router in the following sequence (see
Chapter 1: System Overview and Architecture
Figure 3 on
Figure 3 on page 8):
7