Copyright © 2013, Juniper Networks, Inc.
NOTE:
Redundant SCGs must be the same model number, except during
upgrade.
Table 17: Supported SCGs
Name
SCG with DB-9 ports
(Figure 27 on page
49)
SCG with RJ-48 ports
(Figure 28 on page
49)
Figure 27: SCG with DB-9 Ports
Figure 28: SCG with RJ-48 ports
Online/Offline button
OK
Fail
Master
Each SCG consists of the following components:
19.44-MHz Stratum 3 clock.
Field-programmable gate array (FPGA) that performs multiplexing of clock sources.
These components are located on the SCG faceplate:
Three LEDs—
,
, and
OK
FAIL
SCG online/offline button.
Two external clock inputs.
Chapter 3: T640 Router Hardware Component Overview
Model Number
SCG-T
SCG-T-EC
EXTERNAL CLOCK INPUTS
, that display the status of the SCG.
MASTER
First Supported Junos OS
Release
5.3
10.4
49