Configuration Rules - Sun Microsystems Enterprise 250 Owner's Manual

The system's main logic board provides slots for two UltraSPARC II CPU modules.
Each processor module includes one CPU chip with integrated cache memory for
data and instructions, as well as 1 Mbyte or more of external SRAM cache memory.
Processor modules communicate with the system's main memory and I/O
subsystem via the system's high-speed Ultra Port Architecture (UPA) data bus.
The UPA's clock rate is automatically synchronized with the clock speed of the CPU
modules, and the UPA clock operates at either one third or one fourth the clock rate
of the CPUs. For example, if the CPUs operate at 300 MHz, the UPA will operate at a
clock rate of 100 MHz.
For information on installing CPU modules, see "How to Install a CPU Module" on
page 110.
Configuration Rules
One or two CPU modules can be installed. Only UltraSPARC II processors are
supported.
The first CPU module must be installed in the slot labeled CPU0—the one closest to
the system's four PCI slots.
If you install two CPU modules, the two must operate at identical clock speeds
(300 MHz, for example) and they must have the same size cache memory. This
generally means the two CPU modules must have the same part number.
The following figure shows the CPU slot locations on the main logic board.
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Hardware Configuration