Table 6-20: Single Color 8-Bit Panel A.c. Timing (Format 1); Figure 6-22: Single Color 8-Bit Panel A.c. Timing (Format 1) - Epson S1D13706 Technical Manual

Epson Research and Development
Vancouver Design Center
Sync Timing
Data Timing
FPDAT[7:0]
Symbol
t1 FPFRAME setup to FPLINE falling edge
t2 FPFRAME hold from FPLINE falling edge
t3 FPLINE period
t4 FPLINE pulse width
t6a FPSHIFT falling edge to FPLINE rising edge
t6b FPSHIFT2 falling edge to FPLINE rising edge
t7a FPSHIFT falling edge to FPLINE falling edge
t7b FPSHIFT2 falling edge to FPLINE falling edge
t8 FPLINE falling edge to FPSHIFT rising, FPSHIFT2 falling edge
t9 FPSHIFT2, FPSHIFT period
t10 FPSHIFT2, FPSHIFT pulse width low
t11 FPSHIFT2, FPSHIFT pulse width high
t12 FPDAT[7:0] setup to FPSHIFT2, FPSHIFT falling edge
t13 FPDAT[7:0] hold from FPSHIFT2, FPSHIFT falling edge
t14 FPLINE falling edge to FPSHIFT rising edge
1. Ts = pixel clock period
2. t1 = HPS + t4
min min
3. t2 = t3 - (HPS + t4
min min
4. t3 = HT
min
5. t4 = HPW
min
6. t6a = HPS - (HDP + HDPS), if negative add t3
min
7. t6b = HPS - (HDP + HDPS) + 2, if negative add t3
min
8. t14 = HDPS - (HPS + t4
min
Hardware Functional Specification
Issue Date: 01/11/13
FPFRAME
FPLINE
FPLINE
FPSHIFT
FPSHIFT2

Figure 6-22: Single Color 8-Bit Panel A.C. Timing (Format 1)

Table 6-20: Single Color 8-Bit Panel A.C. Timing (Format 1)

Parameter
)
min
), if negative add t3
min
t1
t4
t6a
t6b
t8
t7a t14
t7b
t12 t13
note 2
note 3
note 4
note 5
note 6
note 7
t6a + t4
t6b + t4
t14 + 2
note 8
min
min
min
t2
t3
t9
t11 t10
t12 t13
2
1
Min Typ Max
4 6
2
2
1
1
Page 67
Units
Ts (note 1)
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
S1D13706
X31B-A-001-08