Epson S1D13706 Technical Manual page 493

Epson Research and Development
Vancouver Design Center
Table 3-1: Host Bus Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4-1: List of Connections from MPC821ADS to S1D13706 . . . . . . . . . . . . . . . . . . 16
Table 4-3: CLKI to BCLK Divide Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 4-2: Summary of Power-On/Reset Configuration Options . . . . . . . . . . . . . . . . . . . 18
Figure 2-1: Power PC Memory Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 2-2: Power PC Memory Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 2-3: GPCM Memory Devices Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 4-1: Typical Implementation of MPC821 to S1D13706 Interface . . . . . . . . . . . . . . . 15
Interfacing to the Motorola MPC821 Microprocessor
Issue Date: 01/02/23
List of Tables
List of Figures
Page 5
S1D13706
X31B-G-009-02