S1D13706 Host Bus Interface; Host Bus Interface Pin Mapping - Epson S1D13706 Technical Manual

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3 S1D13706 Host Bus Interface

X31B-G-002-02

The S1D13706 directly supports multiple processors. The S1D13706 implements a 16-bit

Generic #2 Host Bus Interface which is most suitable for connection to the Toshiba

TMPR3905/12 microprocessor.

The Generic #2 Host Bus Interface is selected by the S1D13706 on the rising edge of

RESET#. After releasing reset the bus interface signals assume their selected configuration.

For details on the S1D13706 configuration, see Section 4.2, "S1D13706 Hardware Config-

uration" on page 14.

The following table shows the functions of each Host Bus Interface signal.

Table 3-1: Host Bus Interface Pin Mapping

Toshiba TMPR3905/12

External Decode

External Decode

connect to HIO V

system RESET

Interfacing to the Toshiba MIPS TMPR3905/3912 Microprocessors

Epson Research and Development

Vancouver Design Center

Issue Date: 01/02/23

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