Epson S1D13706 Technical Manual page 421

Epson Research and Development
Vancouver Design Center
A[25:0]
CARDREG*
ALE
D[31:16]
CARD1CSL*
CARD1CSH*
RD*
WE*
CARD1WAIT*
A[25:0]
ALE
D[31:16]
CARD1CSL*
CARD1CSH*
CARDIORD*
CARDIOWR*
CARD1WAIT*
CARDREG*
Interfacing to the Toshiba MIPS TMPR3905/3912 Microprocessors
Issue Date: 01/02/23
Figure 2-1: "Toshiba 3905/12 PC Card Memory/Attribute Cycle," illustrates a typical
memory/attribute cycle on the Toshiba 3905/12 PC Card bus.
Figure 2-1: Toshiba 3905/12 PC Card Memory/Attribute Cycle
Figure 2-2: "Toshiba 3905/12 PC Card IO Cycle," illustrates a typical IO cycle on the
Toshiba 3905/12 PC Card bus.
Figure 2-2: Toshiba 3905/12 PC Card IO Cycle
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S1D13706
X31B-G-002-02