Page 10
3 S1D13706 Host Bus Interface
3.1 Host Bus Interface Pin Mapping
S1D13706
X31B-G-013-02
The S1D13706 directly supports multiple processors. The S1D13706 implements a
MC68K #2 Host Bus Interface which directly supports the Motorola MC68030 micropro-
cessor.
The MC68K #2 Host Bus Interface is selected by the S1D13706 on the rising edge of
RESET#. After RESET# is released, the bus interface signals assume their selected config-
uration. For details on the S1D13706 configuration, see Section 4.2, "S1D13706 Hardware
Configuration" on page 13.
The following table shows the functions of each Host Bus Interface signal.
Table 3-1: Host Bus Interface Pin Mapping
S1D13706
Pin Names
AB[16:0]
DB[15:0]
WE1#
CS#
M/R#
CLKI
BS#
RD/WR#
RD#
WE0#
WAIT#
RESET#
Motorola MC68030
A[16:0]
D[31:16]
DS
External Decode
External Decode
CLK
AS
R/W
External Decode of SIZ1 and SIZ0
SIZ0
DSACK1
System RESET
Interfacing to the Motorola MC68030 Microprocessor
Epson Research and Development
Vancouver Design Center
Issue Date: 01/02/23