Table 2-8. Integer Compare Instructions - IBM PowerPC 750GX User Manual

Table 2-7. Integer Arithmetic Instructions
Name
Add to Zero Extended
Subtract from Zero Extended
Negate
Multiply Low Immediate
Multiply Low
Multiply High Word
Multiply High Word Unsigned
Divide Word
Divide Word Unsigned
Although there is no Subtract Immediate instruction, its effect can be achieved by using an addi instruction
with the immediate operand negated. Simplified mnemonics are provided that include this negation. The subf
instructions subtract the second operand (rA) from the third operand (rB). Simplified mnemonics are provided
in which the third operand is subtracted from the second operand. See Appendix F, "Simplified Mnemonics,"
in the PowerPC Microprocessor Family: The Programming Environments Manual for examples.
The UISA states that an implementation that executes instructions that set the overflow enable bit (OE) or the
carry bit (CA) can either execute these instructions slowly or prevent execution of the subsequent instruction
until the operation completes. Chapter 6, Instruction Timing, on page 209 describes how the 750GX handles
CR dependencies. The summary overflow bit (SO) and overflow bit (OV) in the Integer Exception Register
are set to reflect an overflow condition of a 32-bit result. This can happen only when OE = 1.
Integer Compare Instructions
The integer compare instructions algebraically or logically compare the contents of register rA with either the
zero-extended value of the unsigned immediate value (UIMM) operand, the sign-extended value of the
signed immediate value (SIMM) operand, or the contents of register rB. The comparison is signed for the
cmpi and cmp instructions, and unsigned for the cmpli and cmpl instructions. Table 2-8 summarizes the
integer compare instructions. For more information, see the PowerPC Microprocessor Family: The Program-
ming Environments Manual.

Table 2-8. Integer Compare Instructions

Name
Compare Immediate
Compare
Compare Logical Immediate
Compare Logical
1. See Conventions Used in This Manual on page 20.
The crfD operand can be omitted if the result of the comparison is to be placed in CR0. Otherwise, the target
CR field must be specified in crfD, using an explicit field number.
For information on simplified mnemonics for the integer compare instructions see Appendix F, "Simplified
Mnemonics," in the PowerPC Microprocessor Family: The Programming Environments Manual.
gx_02.fm.(1.2)
March 27, 2006
IBM PowerPC 750GX and 750GL RISC Microprocessor
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Mnemonic
addze (addze. addzeo addzeo.)
subfze (subfze. subfzeo subfzeo.)
neg (neg. nego nego.)
mulli
mullw (mullw. mullwo mullwo.)
mulhw (mulhw.)
mulhwu (mulhwu.)
divw (divw. divwo divwo.)
divwu divwu. divwuo divwuo.
Mnemonic
cmpi
cmp
cmpli
cmpl
User's Manual
Syntax
rD,rA
rD,rA
rD,rA
rD,rA,SIMM
rD,rA,rB
rD,rA,rB
rD,rA,rB
rD,rA,rB
rD,rA,rB
1
Syntax
crfD,L,rA,SIMM
crfD,L,rA,rB
crfD,L,rA,UIMM
crfD,L,rA,rB
Programming Model
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