Branch Instructions And Completion; Figure 6-7. Branch Taken; Figure 6-8. Removal Of Fall-Through Branch Instruction - IBM PowerPC 750GX User Manual

Figure 6-7. Branch Taken

Branch Folding
(Taken Branch/BTIC Hit)
Clock 0
IQ5 add5
IQ4 add4
IQ3 add3
IQ2 b
IQ1 add2
IQ0 add1
Figure 6-8 shows the removal of fall-through branch instructions, which occurs when a branch is not taken or
is predicted as not taken.

Figure 6-8. Removal of Fall-Through Branch Instruction

When a branch instruction is detected before it reaches a dispatch position, and if the branch is correctly
predicted as taken, folding the branch instruction (and any instructions from the incorrect path) reduces the
latency required for flow control to zero. Instruction execution proceeds as though the branch was never
there.
The advantage of removing the fall-through branch instructions at dispatch is only marginally less than that of
branch folding. Because the branch is not taken, only the branch instruction needs to be discarded. The only
cost of expelling the branch instruction from one of the dispatch entries rather than folding it is missing a
chance to dispatch an executable instruction from that position.

6.4.1.2 Branch Instructions and Completion

As described in the previous section, instructions that do not update either the LR or CTR are removed from
the instruction stream before they reach the completion queue, either for branch taken or by removing fall-
through branch instructions at dispatch. However, branch instructions that update the architected LR and
CTR must do so in program order. Therefore, they must perform write-back in the completion stage, like the
instructions that update the FPRs and GPRs.
Branch instructions that update the CTR or LR pass through the instruction queue like nonbranch instruc-
tions. At the point of dispatch, however, they are not sent to an execution unit, but rather are assigned a slot
in the completion queue, as shown in Figure 6-9 on page 228.
gx_06.fm.(1.2)
March 27, 2006
Clock 1 Clock 2
and6
and5
and2 and4
and1 and3
Branch Fall-Through
(Not-Taken Branch)
Clock 0
IQ5 add5
IQ4 add4
IQ3 add3
IQ2 b
IQ1 add2
IQ0 add1
IBM PowerPC 750GX and 750GL RISC Microprocessor
Branch Folding
(Taken Branch/BTIC Miss)
Clock 0
IQ5 add5
IQ4 add4
IQ3 add3
IQ2 b
IQ1 add2
IQ0 add1
Clock 1 Clock 2
add8 etc.
add7 add9
add6 add8
add5 add7
add4 add6
add3 add5
User's Manual
Clock 1 Clock 2
and4
and3
and2
and1
Instruction Timing
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