IBM PowerPC 750GX User Manual page 111

Risc microprocessor
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Table 2-33. PowerPC Encodings
Register Name
2
TBL
2
TBU
XER
Note:
1. The order of the two 5-bit halves of the SPR number is reversed compared with actual instruction coding. For mtspr and mfspr
instructions, the SPR number coded in assembly language does not appear directly as a 10-bit binary number in the instruction.
The number coded is split into two 5-bit halves that are reversed in the instruction, with the high-order five bits appearing in bits
16–20 of the instruction and the low-order five bits in bits 11–15.
2. The TB Registers are referred to as TBRs rather than SPRs and can be written to using the mtspr instruction in supervisor mode
and the TBR numbers here. The TB Registers can be read in user mode using either the mftb or mfspr instruction and specifying
TBR 268 for TBL and SPR 269 for TBU.
gx_02.fm.(1.2)
March 27, 2006
(Page 3 of 3)
1
SPR
Decimal
SPR[5–9]
268
01000
284
01000
269
01000
285
01000
1
00000
IBM PowerPC 750GX and 750GL RISC Microprocessor
Access
SPR[0–4]
01100
User (VEA)
11100
Supervisor (OEA)
01101
User (VEA)
11101
Supervisor (OEA)
00001
User (UISA)
User's Manual
mfspr/mtspr
mfspr
mtspr
mfspr
mtspr
Both
Programming Model
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