Table 2-34. Spr Encodings For 750Gx-Defined Registers (Mfspr) - IBM PowerPC 750GX User Manual

User's Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
Encodings for the 750GX-specific SPRs are listed in Table 2-34.

Table 2-34. SPR Encodings for 750GX-Defined Registers (mfspr)

Register Name
DABR
HID0
HID1
HID2
IABR
ICTC
L2CR
MMCR0
MMCR1
PMC1
PMC2
PMC3
PMC4
2
Reserved
SIA
THRM1
THRM2
THRM3
THRM4
UMMCR0
UMMCR1
UPMC1
UPMC2
UPMC3
UPMC4
USIA
Note:
1. The order of the two 5-bit halves of the SPR number is reversed compared with actual instruction coding.
For mtspr and mfspr instructions, the SPR number coded in assembly language does not appear directly as a 10-bit binary num-
ber in the instruction. The number coded is split into two 5-bit halves that are reversed in the instruction, with the high-order 5 bits
appearing in bits 16–20 of the instruction and the low-order 5 bits in bits 11–15.
2. These registers are reserved for future use and the contents should not be changed or reset.
Programming Model
Page 112 of 377
1
SPR
Decimal SPR[5–9]
1013 11111
1008 11111
1009 11111
1016 11111
1010 11111
1019 11111
1017 11111
952 11101
956 11101
953 11101
954 11101
957 11101
958 11101
921–924
955 11101
1020 11111
1021 11111
1022 11111
920 11100
936 11101
940 11101
937 11101
938 11101
941 11101
942 11101
939 11101
Access
SPR[0–4]
10101 User
10000 Supervisor
10001 Supervisor
11000 Supervisor
10010 Supervisor
11011 Supervisor
11001 Supervisor
11000 Supervisor
11100 Supervisor
11001 Supervisor
11010 Supervisor
11101 Supervisor
11110 Supervisor
Supervisor
11011 Supervisor
11100 Supervisor
11101 Supervisor
11110 Supervisor
11000 Supervisor
01000 User
01100 User
01001 User
01010 User
01101 User
01110 User
01011 User
mfspr/mtspr
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
mfspr
mfspr
mfspr
mfspr
mfspr
mfspr
mfspr
mfspr
gx_02.fm.(1.2)
March 27, 2006