IBM PowerPC 750GX User Manual page 148

Risc microprocessor
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User's Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
Table 3-7. MEI State Transitions
Cache
Operation
Operation
Data-cache-
dcbst
block store
Data-cache-
dcbst
block store
Data-cache-
dcbz
block set to
zero
Data-cache-
dcbz
block set to
zero
Data-cache-
dcbz
block set to
zero
Data-cache-
dcbz
block set to
zero
Data-cache-
dcbt
block touch
Data-cache-
dcbt
block touch
Data-cache-
dcbt
block touch
Data-cache-
dcbt
block touch
Single-beat read
Reload dump 1
4-beat read (dou-
Reload dump
ble-word-aligned)
4-beat write (dou-
Reload dump
ble-word-aligned)
Snoop
E
I
write or kill
Snoop
M
I
kill
Push
Snoop
M
I
flush
Push
Snoop
M
E
clean
Note: Single-beat writes are not snooped in the write queue.
Instruction-Cache and Data-Cache Operation
Page 148 of 377
(Page 2 of 3)
Current
Bus
WIM
Cache
Sync
State
I,E
No
xxx
Same
No
xxx
M
No
x1x
x
No
10x
x
I
Yes
00x
Same
No
00x
E,M
No
x1x
I
No
x1x
M
No
x0x
I
No
x0x
E,M
No
xxx
I
No
xxx
I
No
xxx
I
No
xxx
E
No
xxx
M
No
xxx
M
No
xxx
M
Next
Cache
Cache Actions
State
dcbst.
Same
Pass clean.
Same
No action.
E
Push block to write queue.
x
Alignment trap.
x
Alignment trap.
Cast out of modified block.
Same
Pass kill.
M
Clear block.
M
Clear block.
Pass single-beat read to memory
Same
queue.
I
Push block to write queue.
Cast out of modified block (as
required).
Same
Pass 4-beat read to memory queue.
Same
No action.
Same
Forward data_in.
E
Write data_in to cache.
M
Write data_in to cache.
I
State change only (committed).
I
State change only (committed).
I
Conditionally push.
E
Conditionally push.
Bus Operation
Clean
Write-with-kill
Write-with-kill
Kill
Read
Write-with-kill
Write-with-kill
Read
Write-with-kill
Write-with-kill
gx_03.fm.(1.2)
March 27, 2006

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