Classes Of Instructions; Definition Of Boundedly Undefined; Defined Instruction Class - IBM PowerPC 750GX User Manual

that the architecture specification refers to simplified mnemonics as extended mnemonics. Programs written
to be portable across the various assemblers for the PowerPC Architecture should not assume the existence
of mnemonics not described in that document.

2.3.1 Classes of Instructions

The 750GX instructions belong to one of the following three classes.
• Defined
• Illegal
• Reserved
Note that while the definitions of these terms are consistent among the PowerPC processors, the assignment
of these classifications is not. For example, PowerPC instructions defined for 64-bit implementations are
treated as illegal by 32-bit implementations such as the 750GX.
The class is determined by examining the primary opcode and the extended opcode, if any. If the opcode, or
combination of opcode and extended opcode, is not that of a defined instruction or of a reserved instruction,
the instruction is illegal.
Instruction encodings that are now illegal might be assigned to instructions in the architecture or might be
reserved by being assigned to processor-specific instructions.

2.3.1.1 Definition of Boundedly Undefined

If instructions are encoded with incorrectly set bits in reserved fields, the results on execution can be said to
be boundedly undefined. If a user-level program executes the incorrectly coded instruction, the resulting
undefined results are bounded in that a spurious change from user to supervisor state is not allowed, and the
level of privilege exercised by the program in relation to memory access and other system resources cannot
be exceeded. Boundedly-undefined results for a given instruction might vary between implementations, and
between execution attempts in the same implementation.

2.3.1.2 Defined Instruction Class

Defined instructions are guaranteed to be supported in all PowerPC implementations, except as stated in the
instruction descriptions in Chapter 8, "Instruction Set," of the the PowerPC Microprocessor Family: The
Programming Environments Manual. The 750GX provides hardware support for all instructions defined for
32-bit implementations.
It does not support the optional Floating Square Root (Double-Precision) (fsqrt), Floating Square Root
(Single-Precision) (fsqrts), and Translation Lookaside Buffer Invalidate All (tlbia) instructions.
A PowerPC processor invokes the illegal instruction error handler (part of the program exception) when the
unimplemented PowerPC instructions are encountered so they can be emulated in software, as required.
Note that the architecture specification refers to exceptions as interrupts.
A defined instruction can have invalid forms. The 750GX provides limited support for instructions represented
in an invalid form.
gx_02.fm.(1.2)
March 27, 2006
IBM PowerPC 750GX and 750GL RISC Microprocessor
User's Manual
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