IBM PowerPC 750CL Tsi109 Manuals

Manuals and User Guides for IBM PowerPC 750CL Tsi109. We have 1 IBM PowerPC 750CL Tsi109 manual available for free PDF download: User Manual

IBM PowerPC 750CL Tsi109 User Manual (92 pages)

Brand: IBM | Category: Motherboard | Size: 1 MB

Table of Contents
3
Figures
7
Tables
9
About this Book
11
Overview
13
Board Features
13
Board Design
15
Figure 2-1. PPC750CL Tsi109 Evaluation Board Architecture
15
Processor
16
Bus
16
Interrupts and Resets
16
Clocking and Clock Controls
16
Jtag
16
Host Bridge
16
Table 2-1. 750CL Signals Not Supported by Tsi109
16
Power-Up Options
17
Clock Generator Configuration
17
JTAG Port
17
Board Clocking
18
Figure 2-2. Board Clocking Block Diagram
18
DDR2 DIMM (Memory Module) Connectors
19
FLASH, SRAM, and NVRAM Memory
19
Figure 2-3. Memory Connection to Host Local Port
19
PCI/X Bus
20
Figure 2-4. PCI/X Bus
20
Ethernet
21
Figure 2-5. Tsi109 Connection to Ethernet Phys
21
Table 2-2. Serial Management Interface PHY Address
21
SEEP and Real Time Clock
22
Power Supply
22
Table 2-3. I 2 C Addresses
22
Power Rating Per Rail
23
Power Sequencing
23
Table 2-4. Worst Case Power Requirement Per Rail
23
Power Modules
24
Figure 2-6. Power Sequencing
24
Fan Tachometer
25
PCB Design
25
Figure 2-7. Power Supply Block Diagram
25
Memory Map
27
Table 3-1. PIBS Memory Map -- Processor View
27
Table 3-2. Memory Map - PCI/X View
27
Reset and Interrupts
29
Figure 4-1. Board-Level Resets
29
Figure 4-2. Board Interrupts
30
PCI Slots
30
Real Time Clock
30
Table 4-1. PCI/X Slot Interrupt Mapping
30
Switches
31
Power Switch - SW1
31
Reset Switch - SW2
31
Processor PLL Setting DIP Switch - S2
31
Figure 5-1. Switch Locations
31
Tsi109 PLL Setting DIP Switch - S1
32
Table 5-1. S2 Settings
32
Table 5-2. S1 Settings
32
Fuses, Regulator and Fan
35
Fuses
35
Figure 6-1. Fuse
35
Figure 6-2. Fuse Locations
35
Table 6-1. Fuse Rating and Replacement Part Number
35
PPC750CL Regulator
36
Table 6-2. Resistor Values for Core Voltage Setting
36
Figure 6-3. R486 Location (Bottom View)
37
Processor Heatsink and Fan
38
Figure 6-4. Heatsink and Fan Assembly
38
Figure 6-5. Fan Connector Pin Description
38
Displays
39
Power and Reset Status LED (D26)
39
Figure 7-1. LED Location
39
Table 7-1. Power and Reset Status LED
39
PCI/X Setup Status
40
Ethernet Links Speed
40
Figure 7-2. PCI/X Setup Status LED Location
40
Figure 7-3. Ethernet Link Speed LED Location
40
Table 7-2. PCI/X Setup Status LED
40
Ethernet Link Status
41
Figure 7-4. Ethernet Link Status Location
41
Table 7-3. Ethernet Link Speed Status LED
41
Gpio
42
Figure 7-5. GPIO LED Location
42
Table 7-4. Ethernet Link Status LED
42
Gpio Led
43
Jumpers
45
J1 - Tsi109 Power-Up Configuration
45
Figure 8-1. Jumper Location
45
Figure 8-2. J1 Jumper Block Pin Assignment
45
J11 - PCI/X Bus FET Switch Control
46
Figure 8-3. J11 Location
46
Table 8-1. Tsi109 Power-Up Configuration Options
46
Table 8-2. J11 Bus Switch
46
J14 - Small FLASH Chip Select
47
J15 - Big FLASH CS
47
Figure 8-4. J14 Pin Assignment
47
Figure 8-5. J15 Pin Assignment
47
Table 8-3. J14 Small FLASH Chip Select
47
J16 - Force Power Supply on
48
Figure 8-6. J16 Location
48
Table 8-4. Big FLASH Chip Select
48
Table 8-5. Force Power Supply on
48
J17 - Sram Cs
49
J19 - Pci M66En
49
Figure 8-7. J17 Location
49
Figure 8-8. J19 Location
49
Table 8-6. Small FLASH Chip Select
49
Table 8-7. PCI M66EN
49
J20 - PCIXCAP Override
50
J21 - CPU Heatsink Fan Detection Override
50
Figure 8-9. J20 Pin Assignment
50
Figure 8-10. J21 Pin Assignment
50
Table 8-8. PCIXCAP Override
50
Table 8-9. CPU Heatsink Fan Detection Override
51
Connectors
53
J2 - Tsi109 GPIO
53
Figure 9-1. Connector Location
53
Figure 9-2. J2 - Pin Assignment
53
J3, J4 - DDR2 Memory Module Connectors
54
Figure 9-3. 240-Pin DDR2 DIMM Connector Pin Assignment (Top View)
54
Table 9-1. J2 - Tsi109 GPIO Connector Signal Assignment
54
Table 9-2. Memory Module Connector Signal Assignment
55
Table 9-3. 240-Pin DDR2 DIMM Pin Assignment (J3 and J4)
56
J5 - Fan
57
J6 - Dual DB9 RS-232 Serial Port
57
Figure 9-4. J5 Pin Assignment
57
Figure 9-5. J6 - Dual DB9 RS-232 Serial Port Pin Assignment
57
Table 9-4. J5 - Heatsink Fan Connector Signal Assignment
57
J7 - CPU JTAG Debugger Connector
58
Figure 9-6. J7 - CPU JTAG Debugger Connector Pin Assignment
58
Table 9-5. J6 - Dual DB9 RS-232 Serial Port Signal Assignment
58
J9 - Tsi109 JTAG Pin Assignment
59
Figure 9-7. J9 - Tsi109 JTAG Connector Pin Assignment
59
Table 9-6. J7 - CPU JTAG Debugger Signal Assignment
59
J10, J12, J13 - PCI/X Connector
60
Figure 9-8. PCI/X Connector Pin Assignment (Top View)
60
Table 9-7. J9 - Tsi109 JTAG Connector Signal Assignment
60
Table 9-8. PCI/X Connector Pin Description
60
J18 - Cpld Jtag
63
Figure 9-9. J18 - CPLD JTAG Connector Pin Assignment
63
Table 9-9. J18 - Tsi109 JTAG Connector Signal Assignment
63
J22 - ATX Power
64
Figure 9-10. ATX Power Connector Pin Assignment
64
Table 9-10. J22 - ATX Power Connector Pin Assignment
64
U2 - RJ45 Connector
65
Figure 9-11. U2 - RJ45 Gigabit Ethernet Connector Pin Assignment
65
Table 9-11. U2 - Dual RJ45 Ethernet Port Signal Assignment
65
Programmable Components
67
Cpld
67
Board Reset
67
750 Hreset
67
750 Sreset
67
Memory Reset
67
PCIXCAP Inversion for Tsi109
67
PCI/X Leds
67
Ethernet Speed LED
67
Flash
67
Seep
68
CPLD Program
69
Bill of Materials
75
Index
89
Revision Log
91

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IBM PowerPC 750CL Tsi109 User Manual (92 pages)

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